Cracked Chips A Surface Mount’s Weakness

All text Copyright Bob Willis, EPS

Over the last ten years there has been a number of reasons why chip capacitors have generally been found to fail during production and in the final products supplied to the customer. Although a lot has been learned over the years failure of chip parts is still seen as a manufacturing issue, it not.

The following is a brief outline of the most common causes of component cracking and some of the ways of fixing the problem. Often companies spend weeks with the problem before asking for assistance to pinpoint the true cause of failure.

The design and method of component manufacture can affect the component's ability to stand up to modern manufacturing methods.  In cases where components are selected at the top of the capacitance range for a given package size may increase the likelihood of damage. This is due to the number of layers in the capacitor, components can be more sensitive to fracture failures. Some of the base materials are again more susceptible to damage than others and is often indicated by the suppliers.

Often the component manufacture will suggest de-rating parts for a given process; this is common in many designs. The internal construction and lay up of the internal electrodes may also affect the robustness of the parts. This does vary with different part suppliers and should be evaluated during initial component assessment. Testing parts from suppliers prior to approval and incorporating them in designs is important.

A simple thermal shock test is to take sample parts immersing them in a solder bath at 260oC which simulates the worst case soldering process. Testing is outlined in IPC and IEC standards for other process stages. Any electrical testing is conducted prior to and after the immersion test to confirm the original performance of the parts.

Components, when they are supplied, may be damaged prior to removal from the packaging; this has certainly been seen in the past. Internal cracking may be present and is then exaggerated by the assembly process. Examination of selected components in their packaging may provide examples of defective parts. 

Machine centring and placement of components on to the board has been a problem area over the years. Again this is exaggerated where the parts are less robust. (In an American SMT magazine in the early days called “Nutshell News” the editor called the machine chip crackers). Some of these machines are still used in industry today. More recently it has been the use of board support pins for double sided assembly on printers, placement and even reflow ovens.

Poor positioning of pins under components does not allow the board to move when the component is placed. The incorrect height of board support pins can also exaggerate the problem. If the pins are adjusted too high when the board is clamped for placement the board is actually bowed upwards during placement. Minor cracking may occur and is then shown up during soldering and test.
 
Wave and reflow soldering temperature settings again have been shown to affect component reliability. Minimising the temperature of solder baths to 235-245oC and controlled board pre-heating has mostly eliminated the wave soldering problems in the industry. With the increased use of no clean fluxes the need for higher pre heat temperatures has also forced changes in machine set-up.

It is uncommon for the reflow soldering process to cause failures unless parts have already been damaged. If the quality of the capacitor is poor with internal voiding or stress cracks the reflow process is less likely to cause problems. Cracking of capacitors during reflow is more a myth than a reality.

In the case of wave or reflow soldering, if the board is poorly supported and the board will sag the board may then be warped after soldering. When the board cools the board is left in a warped state. If any subsequent process straightens the board it may cause component cracking as the solder joints now hold the component rigid. A possible example is in‑circuit test where the board is straightened flat during pin contact. The force developed during in-circuit test can be very high, especially if the test point positioned is not correctly balanced.

Hand soldering and rework has also been shown to damage parts if correct procedures are not followed or poorly trained staff are used. It is common where components come into direct contact with a solder bit rather than using the solder to provide effective heat transfer. During any hand soldering operation using soldering irons the solder is used to transfer the heat to the board and component not the bit. Most of these faults are caused by faulty parts or parts damaged at an earlier assembly stage.

Today it is more common to use hot air pencils to rework surface mount component, this minimises physical contact with parts. If the components are correctly specified with a solder coating and solder coated boards are used then normally only flux is required to make a joint. As sufficient solder is already present to make a connection on the board and termination, this is by far the best process. 

A lot has been said about pre heating chip components prior to rework, this is not going to happen in the real world. If you can’t rework parts using standard technique don’t design it into the product. Its called GOOD DFM, Design For Manufacture.

Board flexure during board handling, break out, in-circuit test or final mounting of the board into the final product is the most likely cause of current failures. This is again true if the component is not correctly specified and tested during initial assessment of the supplier. 

Most of the cases currently being examined by EPS for customers are flexure failures. This is also the most common cause of failure over the last couple of years. It is considered that board flexure is one of the main causes of failure. If you break out multi panels using bolt cutters across a bench or just snap “V” scored boards what stress is being applied ???

Alternative laminates or higher Tg materials may help to provide a flat surface for assembly. This is only of value if it coincides with balanced layout during design and correct specification of the solderable finish. The more stable laminate will not help if the board is flexed during assembly.

Design rules are available along with defect causes and cures on many of the CD ROMs and training videos available from the EPS or The SMART Group, Europe’s Largest Surface Mount Trade Association. In many cases these will avoid unnecessary process problems and ultimate component failures in the field.

For further information on EPS services Email Bob Willis or visit his Internet Home Page.

Email: eps@bobwillis.co.uk
Home Page: http://www.bobwillis.co.uk