A Universal PIC18 Bootloader for PDS


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    Default Re: A Universal PIC18 Bootloader for PDS

    The program is written and prepared for the PIC18F27K40.
    I will describe an example for the PIC18F27K40 with Xtal of 16Mhz + PLL + standard options.

    - Device = 18F27K40
    - Declare Xtal = 64
    - $define UART_USED_FOR_BOOTLOADER UART1 (default)
    - Options: _EnableMessages_, _EnableWriteIDLOCS_, _EnablePrintDeviceID_
    - Config Fuses (standard by default with PLL)
    - you will have to copy the same config fuses chosen in your application.

    - Copy the 18F27K40.def & 18F27K40.ppi files to the include folder of PDS. Before save all .def & .PPi files.
    - And use the CoolTerm V146 terminal. (see the article in the wiki for configuration)
    - In summary: The Terminal Baud rate will be 115200 Bauds. 2 stop bits. XON protocol.
    Code:
    '*******************************************************************************
    STEP01: ' (1) CONFIG BY USER:                                                  *
    '* DECLARE THE DEVICE                                                          *
    '******************************************************************************* 
        Device = 18F27K40
    
    '*******************************************************************************
    STEP02: ' (2) CONFIG BY USER:                                                  *
    '* DECLARE THE FOSC                                                            *
    '* FOSC avaibled: 64, 48, 40, 32, 25, 24, 20, 16, 14 (14.32MHz), 12, 10        *
    '******************************************************************************* 
        Declare Xtal = 64 
    
        ' Declare the UART number used for the bootloader. 
        $define UART_USED_FOR_BOOTLOADER UART1      ' Write UART1 = 0 OR UART2 = 1.
    
    '*******************************************************************************
    STEP05: '* (5) CONFIG BY USER:                                                 *
    '* DECLARE SOME MORE OPTIONS FOR THE USER:                                     *
    '*******************************************************************************
    
    ' (1) ENABLE THE MESSAGES OF ERROR OR INFO:
    ' Uncomment the next line to Enable the mensages for the terminal (E & W).
        $define _EnableMessages_
    
    ' (2) ID LOCATIONS:
    ' Uncomment the next line to write the ID Locations option.
        $define _EnableWriteIDLOCS_
    
    ' (3) ENABLE TO PRINT THE DEVICE ID TO THE TERMINAL:
    ' Uncomment the next line to print in the first line of the screen the Devide ID number and revision of the PIC. 
        $define _EnablePrintDeviceID_
    
    
    $if _device = _18F27K40
    Config_Start
    $ifdef _InternalOSC_ 
        FEXTOSC = OFF            ;Oscillator not enabled
        RSTOSC = HFINTOSC_64MHZ    ;HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1
    $else
        FEXTOSC = HS            ;HS (crystal oscillator) above 8 MHz; PFM set to high power
    '    RSTOSC = EXTOSC            ;EXTOSC operating per FEXTOSC bits (device manufacturing default)
        RSTOSC = EXTOSC_4PLL    ;EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits
    $endif
        CLKOUTEN = OFF            ;CLKOUT function is disabled
        CSWEN = On                ;Writing to NOSC and NDIV is allowed
        FCMEN = OFF         ;Fail-Safe Clock Monitor disabled
        MCLRE = EXTMCLR     ;If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR 
        PWRTE = On         ;Power up timer enabled
        LPBOREN = On     ;ULPBOR enabled
        BOREN = On         ;Brown-out Reset enabled according to SBOREN
        BORV = VBOR_245    ;Brown-out Reset Voltage (VBOR) set to 2.45V
        ZCD = OFF        ;ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON
        PPS1WAY = OFF    ;PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)
        STVREN = On        ;Stack full/underflow will cause Reset
        Debug = OFF        ;Background debugger disabled
        XINST = OFF        ;Extended Instruction Set and Indexed Addressing Mode disabled
        WDTCPS = WDTCPS_2    ;Divider ratio 1:128
        WDTE = SWDTEN    ;WDT enabled/disabled by SWDTEN bit
        WDTCWS = WDTCWS_7    ;window always open (100%); software control; keyed access not required
        WDTCCS = SC    ;Software Control
        WRT0 = OFF    ;Block 0 (000800-003FFFh) not write-protected
        WRT1 = OFF    ;Block 1 (004000-007FFFh) not write-protected
        WRT2 = OFF    ;Block 2 (008000-00BFFFh) not write-protected
        WRT3 = OFF    ;Block 3 (00C000-00FFFFh) not write-protected
        WRT4 = OFF    ;Block 4 (010000-013FFFh) not write-protected
        WRT5 = OFF    ;Block 5 (014000-017FFFh) not write-protected
        WRT6 = OFF    ;Block 6 (018000-01BFFFh) not write-protected
        WRT7 = OFF    ;Block 7 (01C000-01FFFFh) not write-protected
        WRTC = On    ;Configuration registers (300000-30000Bh) write-protected
        WRTB = OFF    ;Boot Block (000000-0007FFh) not write-protected
        WRTD = OFF    ;Data EEPROM not write-protected
        SCANE = On    ;Scanner module is available for use, SCANMD bit can control the module
        LVP = On    ;Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored
        Cp = OFF    ;UserNVM code protection disabled
        CPD = OFF    ;DataNVM code protection disabled
        EBTR0 = OFF    ;Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
        EBTR1 = OFF    ;Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
        EBTR2 = OFF    ;Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
        EBTR3 = OFF    ;Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
        EBTR4 = OFF    ;Block 4 (010000-013FFFh) not protected from table reads executed in other blocks
        EBTR5 = OFF    ;Block 5 (014000-017FFFh) not protected from table reads executed in other blocks
        EBTR6 = OFF    ;Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks
        EBTR7 = OFF    ;Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks
        EBTRB = OFF    ;Boot Block (000000-0007FFh)not protected from table reads executed in other blocks
    Config_End
    $endif
    Last edited by AlbertoFS; 9th October 2017 at 15:34.
    73's de Alberto ea3agv

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