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  1. #31
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    The program is written and prepared for the PIC18F27K40.
    I will describe an example for the PIC18F27K40 with Xtal of 16Mhz + PLL + standard options.

    - Device = 18F27K40
    - Declare Xtal = 64
    - $define UART_USED_FOR_BOOTLOADER UART1 (default)
    - Options: _EnableMessages_, _EnableWriteIDLOCS_, _EnablePrintDeviceID_
    - Config Fuses (standard by default with PLL)
    - you will have to copy the same config fuses chosen in your application.

    - Copy the 18F27K40.def & 18F27K40.ppi files to the include folder of PDS. Before save all .def & .PPi files.
    - And use the CoolTerm V146 terminal. (see the article in the wiki for configuration)
    - In summary: The Terminal Baud rate will be 115200 Bauds. 2 stop bits. XON protocol.
    Code:
    '*******************************************************************************
    STEP01: ' (1) CONFIG BY USER:                                                  *
    '* DECLARE THE DEVICE                                                          *
    '******************************************************************************* 
        Device = 18F27K40
    
    '*******************************************************************************
    STEP02: ' (2) CONFIG BY USER:                                                  *
    '* DECLARE THE FOSC                                                            *
    '* FOSC avaibled: 64, 48, 40, 32, 25, 24, 20, 16, 14 (14.32MHz), 12, 10        *
    '******************************************************************************* 
        Declare Xtal = 64 
    
        ' Declare the UART number used for the bootloader. 
        $define UART_USED_FOR_BOOTLOADER UART1      ' Write UART1 = 0 OR UART2 = 1.
    
    '*******************************************************************************
    STEP05: '* (5) CONFIG BY USER:                                                 *
    '* DECLARE SOME MORE OPTIONS FOR THE USER:                                     *
    '*******************************************************************************
    
    ' (1) ENABLE THE MESSAGES OF ERROR OR INFO:
    ' Uncomment the next line to Enable the mensages for the terminal (E & W).
        $define _EnableMessages_
    
    ' (2) ID LOCATIONS:
    ' Uncomment the next line to write the ID Locations option.
        $define _EnableWriteIDLOCS_
    
    ' (3) ENABLE TO PRINT THE DEVICE ID TO THE TERMINAL:
    ' Uncomment the next line to print in the first line of the screen the Devide ID number and revision of the PIC. 
        $define _EnablePrintDeviceID_
    
    
    $if _device = _18F27K40
    Config_Start
    $ifdef _InternalOSC_ 
        FEXTOSC = OFF            ;Oscillator not enabled
        RSTOSC = HFINTOSC_64MHZ    ;HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1
    $else
        FEXTOSC = HS            ;HS (crystal oscillator) above 8 MHz; PFM set to high power
    '    RSTOSC = EXTOSC            ;EXTOSC operating per FEXTOSC bits (device manufacturing default)
        RSTOSC = EXTOSC_4PLL    ;EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits
    $endif
        CLKOUTEN = OFF            ;CLKOUT function is disabled
        CSWEN = On                ;Writing to NOSC and NDIV is allowed
        FCMEN = OFF         ;Fail-Safe Clock Monitor disabled
        MCLRE = EXTMCLR     ;If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR 
        PWRTE = On         ;Power up timer enabled
        LPBOREN = On     ;ULPBOR enabled
        BOREN = On         ;Brown-out Reset enabled according to SBOREN
        BORV = VBOR_245    ;Brown-out Reset Voltage (VBOR) set to 2.45V
        ZCD = OFF        ;ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON
        PPS1WAY = OFF    ;PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)
        STVREN = On        ;Stack full/underflow will cause Reset
        Debug = OFF        ;Background debugger disabled
        XINST = OFF        ;Extended Instruction Set and Indexed Addressing Mode disabled
        WDTCPS = WDTCPS_2    ;Divider ratio 1:128
        WDTE = SWDTEN    ;WDT enabled/disabled by SWDTEN bit
        WDTCWS = WDTCWS_7    ;window always open (100%); software control; keyed access not required
        WDTCCS = SC    ;Software Control
        WRT0 = OFF    ;Block 0 (000800-003FFFh) not write-protected
        WRT1 = OFF    ;Block 1 (004000-007FFFh) not write-protected
        WRT2 = OFF    ;Block 2 (008000-00BFFFh) not write-protected
        WRT3 = OFF    ;Block 3 (00C000-00FFFFh) not write-protected
        WRT4 = OFF    ;Block 4 (010000-013FFFh) not write-protected
        WRT5 = OFF    ;Block 5 (014000-017FFFh) not write-protected
        WRT6 = OFF    ;Block 6 (018000-01BFFFh) not write-protected
        WRT7 = OFF    ;Block 7 (01C000-01FFFFh) not write-protected
        WRTC = On    ;Configuration registers (300000-30000Bh) write-protected
        WRTB = OFF    ;Boot Block (000000-0007FFh) not write-protected
        WRTD = OFF    ;Data EEPROM not write-protected
        SCANE = On    ;Scanner module is available for use, SCANMD bit can control the module
        LVP = On    ;Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored
        Cp = OFF    ;UserNVM code protection disabled
        CPD = OFF    ;DataNVM code protection disabled
        EBTR0 = OFF    ;Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
        EBTR1 = OFF    ;Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
        EBTR2 = OFF    ;Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
        EBTR3 = OFF    ;Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
        EBTR4 = OFF    ;Block 4 (010000-013FFFh) not protected from table reads executed in other blocks
        EBTR5 = OFF    ;Block 5 (014000-017FFFh) not protected from table reads executed in other blocks
        EBTR6 = OFF    ;Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks
        EBTR7 = OFF    ;Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks
        EBTRB = OFF    ;Boot Block (000000-0007FFh)not protected from table reads executed in other blocks
    Config_End
    $endif
    Last edited by AlbertoFS; 9th October 2017 at 15:34.
    73's de Alberto ea3agv

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  • #32
    Junior Member Maxi's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    dear alberto could you clear your private messages?
    I cant send message to you, its full

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  • #33
    Sean_Goddard
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    Default Re: A Universal PIC18 Bootloader for PDS

    Hi Alberto, I am using an 18F37K40 and TRYING to get the internal clock ot work at 8MHz with Proteus but nothing seems to work consistently. Sometimes it runs, then I change something like a PRINT statement and it stops!

    I am going to try to put a 40pin version into the Proton Dev board and see if I can get the REAL thing to run.

    Thanks for the Bootloader posting. Much appreciated, not if I can get this DAMNED MCU to work otherwise I'll just scrap the whole thing and go back down the pub.

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  • #34
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    I have been able to test the bootloader with the internal oscillator at 64Mhz with these parameters. I advise you to try the PIC18F47K40 with an external Xtal first and then you can connect to the internal oscillator.

    you have to keep in mind that the bootloader is expected to "Declare Xtal = 10 to 64 Mhz".
    FOSC avaibled: 64, 48, 40, 32, 25, 24, 20, 16, 14 (14.32MHz), 12, 10

    Config Fuses for internal Oscillator for Declare Xtal = 64 Only

    FEXTOSC = OFF ; External Oscillator not enabled
    RSTOSC = HFINTOSC_64MHZ ; HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1

    Code for internal Oscillator
    OSCCON1 = 110000 ' HFINTOSC is used

    Config Fuses for external Xtal for Declare Xtal = 64 Only
    FEXTOSC = HS ; HS (crystal oscillator) above 8 MHz; PFM set to high power
    RSTOSC = EXTOSC_4PLL ; EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits

    Code for external Xtal
    OSCCON1 = 100000 ' EXTOSC + 4xPLL

    Have you config the UART and other PINS with the PPS code??
    When you have been able to run your test code I can compile a bootloader for you, if you give me the parameters discussed above. Please use the standard UART pins for the UART.
    Regards
    Last edited by AlbertoFS; 10th October 2017 at 17:52.
    73's de Alberto ea3agv

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  • #35
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    New Version 5.0 of the PDS Bootloader

    Note: Sorry, I have deleted all the files instead of making an edition.

    Lester: I can upload only 10 files. I need to upload one more.

    I have written a new configuration format that will allow a simpler use of the Bootloader. In addition I have written a small manual to help users. In the future I hope to write more parts of the manual to give more information about my bootloader.
    Regards

    Alberto
    Last edited by AlbertoFS; 23rd December 2017 at 13:33.
    73's de Alberto ea3agv

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  • #36
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    30/11/2017
    I updated the Manual Part1 and I included a new manual Part2 of the PDS Bootloader.
    73's de Alberto ea3agv

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  • #37
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    In the new version of PDS 3.6.1.2 a lot of code has been modified such as the label of the HRSout routine.
    Before: HRSout
    Now: __hrsout1__
    Take it into account in the replacement routine in my libraries in particular in "HRsout2StopBits.Inc".

    Alberto
    73's de Alberto ea3agv

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  • #38
    Prolific Poster John Drew's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    Alberto, I'm a bit confused. HRSout still seems to be a legitimate call. Maybe it's something that has happened in the Assembly file?
    John

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  • #39
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    Hi John,
    The "HRSOut" was the label also for the asm routine that puts the byte into the UART buffer. I think it is better now to avoid confusing.

    Alberto
    73's de Alberto ea3agv

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  • #40
    Prolific Poster John Drew's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    Hi Alberto,
    That makes sense.
    Best wishes
    John

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  • #41
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    an example:
    Before:
    Code:
        #Disable HRSOut             ' Bypass the compiler's HRSOut library subroutine
    '===============================================================================
        GoTo OverHRSOut1Exit
    '-------------------------------------------------------------------------------
    Asm
    HRSOut
    EndAsm
     Code...
    Return
    now:
    Code:
       #Disable HRSOut             ' Bypass the compiler's HRSOut library subroutine
    '===============================================================================
        GoTo OverHRSOut1Exit
    '-------------------------------------------------------------------------------
    __hrsout1__:
     Code...
    Return
    73's de Alberto ea3agv

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  • #42
    Prolific Poster John Drew's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    That's a simple enough change Alberto, your example makes it clear.
    I had to recompile an old program today and I had problems with the assembler not recognising a call. The particular program goes back to 2014 and there have been a few compiler changes since then.
    The issue seemed to be related to ESTR even though ESTR works fine in another program. These mysteries can be challenging. Work to be done by me first, I don't want to call wolf.
    John

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  • #43
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    Hi all,
    I would intend to create a new bootloader that will record only in the upper part of the ROM from a defined address to update the subroutines and many tables written in the ROM.
    Would this new version have adepts? If many PDS users ask for this, I could think about doing this new project. Which would be the preferred PIC18s.
    I await your comments.
    Alberto
    73's de Alberto ea3agv

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  • #44
    Prolific Poster towlerg's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    Sorry to be dim but I've never used (successfully) a bootloader. Could you expand a bit and explain the pros and cons.
    George.

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  • #45
    Senior Member AlbertoFS's Avatar
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    Default Re: A Universal PIC18 Bootloader for PDS

    Hi George,
    Please, you could read my article regarding my bootloader. It would be a good first step.
    PDSloader

    In particular my bootloader is written in Proton language, which allows the possibility of having many options available (with the preprocessor). It would also be possible to modify it by an advanced user of PDS.

    The great interest of the bootloader is to be able to write a program through the serial port very quickly without making other connections. In addition, if the serial port is used to debug, it is even faster to develop your code.
    My bootloader is more complicated because it only needs a terminal program. What makes it completely free of any update problem. It only depends on the PDS.
    In large development I have recorded the PIC more than 300 times. Imagine connecting and disconnecting the programmer on the ICSP bus every time.

    To make the new version I have to only modify the code in Proton Basic.

    New version:
    The access code will always be mandatory.

    Regards
    Alberto
    Last edited by AlbertoFS; 25th May 2018 at 16:39.
    73's de Alberto ea3agv

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