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Thread: FineLineIDE2919 days old

  1. #141
    Prolific Poster normnet's Avatar
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    Default Re: FineLineIDE

    FineLineIDE 4.2.9 now available here

    v4.2.9:
    Added notification of when FineLineIDE.exe is placed inside a protected directory such as Program Files (x86).

    Norm

  2. #142
    Member craig's Avatar
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    Default Re: FineLineIDE

    Thanks Norm it looks great
    Regards
    Craig

  3. #143
    Prolific Poster towlerg's Avatar
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    Default Re: FineLineIDE

    Here's an odd one for you. For some reason CLKOUTEN in configs is being forced hard left.
    Code:
    '***********************************************************                   ____    ____
    '* Name    : 18F27K42_template.bas                         *                  |    (__)    |
    '* Author  : George Towler                                 *             MCLR + 1       28 + PGD
    '* Date    : 03/11/2018                                    *                  |            |
    '* Version : see VersionHigh/VersionLow                    *              RA0 + 2       27 + PGC
    '* Compiler: 3.6.2.6                                       *                  |            |
    '*                                                         *              RA1 + 3       26 + RB5
    '* Notes   : Same template for 18F26K42                    *                  |            |
    '*         : Confirm PPS settings in Initialisation        *              RA2 + 4       25 + RB4
    '*         : LVP and crystal-less clock enabled in config  *                  |            |
    '*         :                                               *              RA3 + 5       24 + RB3/SDO2
    '*         :                                               *                  |            |
    '*         :                                               *          LED/RA4 + 6       23 + RB2/SDI2/SDA2
    '*         :                                               *                  |            |
    '*         :                                               *          SS1/RA5 + 7       22 + RB1/SCK2/SCL2
    '*         :                                               *                  |            |
    '*         :                                               *              Gnd + 8       21 + RB0/SS2
    '*         :                                               *                  |            |
    '*         :                                               *              RA7 + 9       20 + 5v
    '*         :                                               *                  |            |
    '*         :                                               *              RA6 + 10      19 + Gnd
    '*         :                                               *                  |            |
    '*         :                                               *          RX2/RC0 + 11      18 + RC7/RX1
    '*         :                                               *                  |            |
    '*         :                                               *          TX2/RC1 + 12      17 + RC6/TX1
    '*         :                                               *                  |            |
    '*         :                                               *              RC2 + 13      16 + RC5/SDO1
    '*         :                                               *                  |            |
    '*         :                                               *    SCK1/SCL1/RC3 + 14      15 + RC4/SDI1/SDA1
    '*         :                                               *                  |____________|
    '*         :                                               *            18F27K42 with PPS set in Init (note Rx2/Tx2)
    '*         :                                               *
    '***********************************************************
      Device = 18F27K42
      Xtal = 64                             ' internal clock to PIC (will set Proteus sim in this format)
    
      $define VersionHigh 0                 ' changes which break the system
      $define VersionLow 1                  ' minor changes which do not
      $define EnableSnapShot True           ' True to use SnapShot
      $define D_DumpingLED False            ' True to use a SnapShot indicator LED
    
      $if EnableSnapShot = True
        $define D_UseHardSerial True        ' True = UART        false = bit bang on GPIO 9600
        $define D_HardSerialNum 2           ' 1 or 2 - use second UART (if available)
        $define D_BaudRate 115200           ' required baud rate
        $define D_LimitEEPROM True          ' True to limit EEPROM size to 256 (ie pointer is byte not word)
        $define D_UseCRC False              ' False to egnore CRC and generate a placeholder
        $define D_CheckNulls True           ' True to check for strings of null longer than a data packet payload
        $define D_SendEEPROM True           ' True to send EEPROM data
        $define D_SendPort True             ' True to send Port data
        $if D_DumpingLED = True
          Symbol D_DumpLED = PORTA.4        ' set to the specifics of your LED
        $endif
      $endif
    
    '*******************************  D E C L A R E S  *******************************
      Declare All_Digital = True            ' try to disable analogue peripherals
      Declare Create_Coff = False           ' create a COFF file
      Declare Show_System_Variables = False ' display system variables in Proteus
      Declare Keep_Hex_File = False         ' do not deletes HEX fle on failed compiles - for Auto Import Hex option on PicKit2
      Declare MemWrite_Int_Control = True   ' conrtol interrupts during EEPROM write
      Declare Hints = True                  ' control compiler hints
      Declare Stack_Size = 20               ' stack for pseudo proceedure call/return
      Declare Dead_Code_Remove = False      ' the names a bit of a give away
      Declare Optimiser_Level = 0           ' where n = 0 thro 3 with 0 being off
      Declare TRIS_Reverse = On             ' on = TRSC first then Port/LAT High/Low
    
    
    '*******************************  S Y M B O L S  *******************************
      Symbol LED = PORTA.4
      Symbol INTCON = INTCON0
    
      Symbol PLLEN = OSCTUNE.6            ' software PLL Enable Bit
      Symbol PLLRDY = OSCCON2.7           ' PLL Run Status Bit
      Symbol GO_DONE = ADCON0.1           ' A/D Conversion STATUS Bit
      Symbol ADON = ADCON0.0              ' ADC Enable Bit
      Symbol ADFM = ADCON2.7              ' ADC Right justified
      Symbol PLLR = OSCSTAT.0             ' PLL is Ready Bit
      Symbol FVREN = FVRCON.7             ' FVR enable
      Symbol FVRRDY = FVRCON.6            ' FVR ready
      Symbol ADCMD = PMD2.5               ' ADC enable
    
    '*****************************  V A R I A B L E S  *****************************
      Dim ForCount        As Byte               ' must be first variable
      Dim Dummy           As Byte
      Dim Timer1REG       As TMR1L.Word         ' Alias Timer1REG as a word = TMR1L & TMR1H
      Dim Ad_Result       As ADRESL.Word        ' Convert the ADRESL register into a WORD variable
      Dim EchoResult      As Word
      Dim VDD             As Word
      Dim ResultHi        As Byte
      Dim ResultLo        As Byte
      Dim nCounter        As Byte
    
    '******************************  P R E A M B L E *******************************
      TRISA  = %11101001    ' A7=         A6=         A5=       A4=LED        A3=           A2=Aux        A1=Sel        A0=ADC test
      TRISB  = %11110101    ' B7=PGD      B6=PGC      B5=       B4=           B3=SDO2       B2=SDI2/SDA2  B1=SCK2/SCL2  B0=
      TRISC  = %10110101    ' C7=RX1      C6=TX1      C5=       C4=SDI1/SDA1  C3=SCK1/SCL1  C2=           C1=TX2        C0=RX2
    
      GoSub Initialisation
      $if EnableSnapShot = True
        Include "SnapShot.inc"
        D_AddressStart = AddressOf(ForCount)    ' first variable of interest
      $else
        $SendHint "SnapShot is NOT enabled"
        $define Dump(pValue)
        $define DumpW(pValue)
      $endif
    
      nCounter = 1
    
      On_Hardware_Interrupt GoTo ISR_High       ' Point to interrupt handler
      On_Low_Interrupt GoTo ISR_Low
    
      GoTo MAIN                                 ' Jump over the interrupt handler
    
    
    '************  I N T E R U P T   S E R V I C E    R O U T I N E  **************
    ISR_High:
      Context Save
      ' code
      Context Restore
    
    
    ISR_Low:
      Context Save
      ' code
      Context Restore
    
    ' end of ISR
    
    
    '**********************************  M A I N  **********************************
    MAIN:
      GoSub ConfigUART1
      GoSub ConfigUART2
      LED = 1
    
      ' your magnum opus goes here
    
      While 1 = 1                                 ' blinky
        'HRSOut1 "HRSOut1 thequickbrownfox"
        DelayMS 500
        Toggle LED
        GoSub TestADC
        DumpW(1)
      Wend
    
      Stop
    
    
    '**************************  S U B R O U T I N E S  ****************************
    
    '*******************************************************************************
    ' SUBROUTINE: TestADC
    ' PURPOSE   : GetADC from A0
    ' REQUIRES  : nothing
    ' RETURNS   : a 12 bit value
    ' DESTROYS  : nothing
    '*******************************************************************************
    
    'ADCON0bits.FM = 1;           //right justify                         ensur that ADC is enabled in PMD2
    'ADCON0bits.CS = 1;           //FRC Clock
    'ADPCH = 0x00;                //RA0 is Analog channel
    'TRISAbits.TRISA0 = 1;        //Set RA0 to input
    'ANSELAbits.ANSELA0 = 1;      //Set RA0 to analog
    'ADCON0bits.ON = 1;           //Turn ADC On
    'while (1) {
    'ADCON0bits.GO = 1;           //Start conversion
    'while (ADCON0bits.GO);       //Wait for conversion done
    'resultHigh = ADRESH;         //Read result
    'resultLow
    
    ' 3.1 ADC Conversion in FOSC Mode
    '     The ADCON0.GO bit remains set and the conversion
    '     does not complete successfully when
    '     configured to operate in FOSC mode
    '     (ADCON0.CS=0) with non-zero clock divider
    '     (ADCLK register).
    
    ' Work around
    ' a) Use FOSC as the clock source (ADCON0.CS=0)
    '    and set the clock divider (ADCLK register) to
    '    zero. Ensure that the FOSC frequency does not
    '    violate timing requirements for the ADC.
    ' b) Use ADCRC as the clock source
    '    (ADCON0.CS=1).
    
    TestADC:
      ADCMD = 0
      TRISA  = %11101111         ' A4=LED A0=ADC test
      ADPCH  = %00000000         ' RA0 is Analog channel
      ANSELA = %00000001         ' Select channel AN0
      ADCON0 = %10010100         ' ADC on, Right justify, FRC oscillator
    
      DelayMS 100                ' Wait for sample/hold capacitors to charge
      GO_DONE = 1                ' Start conversion
      While GO_DONE = 1 : Wend   ' Poll the GO_DONE flag for completion of conversion
      ResultHi = ADRESH
      ResultLo = ADRESL
    
      Inc nCounter
      Return
    
    
    '*******************************************************************************
    ' SUBROUTINE: GetVdd
    ' PURPOSE   : measure VDD
    ' REQUIRES  : nothing
    ' RETURNS   : value in VDD in 1/10ths. of volts
    ' DESTROYS  : nothing
    '*******************************************************************************
    GetVdd:
      'FVRMD   = 0
      ADREF  = %00000011         ' NREF = ?, VREF+ - FVR            %000X0011
      FVRCON = %10000001         ' FVR Enable,  Temp off, Comp off, ADC FVR1.024V
      ADCON0 = %10000100         ' ADC on, cont off, Fosc, right justify
      ADCON1 = %00000000         ' ?
      ADCON2 = %00000000         ' ?
      ADCON3 = %00000000         ' ?
      ADCLK  = %00111111         ' Fosc/128
      ADREF  = %00000000         ' VREF- connected to Vss, VREF+ connected Vdd
      ADPCH  = %00111111         ' FVR connected to ADC
      ADPREL = %00000000
      ADPREH = %00000000
    
      'While FVRRDY = 0 : Wend   ' Wait For 1.024v reference To stabilize (always 1)
    
      DelayUS 100                ' Wait for sample/hold capacitors to charge and VP6 to settle
      GO_DONE = 1                ' Start conversion
      While GO_DONE = 1 : Wend   ' Poll the GO_DONE flag for completion of conversion
      EchoResult = Ad_Result
      VDD = 41943/Ad_Result      ' convert input reading to VDD voltage *VDD must be a Word
    
      ADCON0 = %00000100         ' ADC ff, cont off, Fosc, right justify
      FVRCON = %00000001         ' FVR off,  Temp off, Comp off, ADC FVR1.024V
      Return
    
    
    '*******************************************************************************
    ' SUBROUTINE: ConfigUART1
    ' PURPOSE   : configure UART1 to 115200 if not used by SnapShot
    ' REQUIRES  : nothing
    ' RETURNS   : nothing
    ' DESTROYS  : nothing
    '*******************************************************************************
    ConfigUART1:
      $if EnableSnapShot = False Or D_HardSerialNum <> 1 Or D_UseHardSerial = False
        Declare Hserial1_TXSTA  = 36                                                 ' NOTE! 18F27K42 has 2 USARTS
        Declare Hserial1_Baud   = 115200
        Declare Hserial1_RCSTA  = 144
        Declare Hserial1_Clear  = On
        Declare Hserout1_Pin PORTC.6                                                 ' must be declared or compiler will add default
        Declare Hserin1_Pin PORTC.7                                                  ' ensure that this agrees with PPS block in Initialisation
      $endif
      Return
    
    
    '*******************************************************************************
    ' SUBROUTINE: ConfigUART2
    ' PURPOSE   : configure UART2 To 115200 if not used by SnapShot
    ' REQUIRES  : nothing
    ' RETURNS   : nothing
    ' DESTROYS  : nothing
    '*******************************************************************************
    ConfigUART2:
      $if EnableSnapShot = False Or D_HardSerialNum <> 2 Or D_UseHardSerial = False
        Declare Hserial2_TXSTA  = 36                                                   ' NOTE! 18F27K42 has 2 USARTS
        Declare Hserial2_Baud   = 115200
        Declare Hserial2_RCSTA  = 144
        Declare Hserial2_Clear  = On
        Declare Hserout2_Pin PORTC.1                                                   ' must be declared or compiler will add default
        Declare Hserin2_Pin PORTC.0                                                    ' ensure that this agrees with PPS block in Initialisation
      $endif
      Return
    
      Stop                                              ' jic
    
    
    '***********************  I N I T I A L I S A T I O N  *************************
    Initialisation:
    
      ' Setup for internal FRC clock
    
      ADCON0 = %00000000 ' Disable ADC
      ANSELA = $00       ' set in .DEF
      ANSELB = $00
      ANSELC = $00
      CM1CON0 = $00
      CM2CON0 = $00
    
    
      '          x------- Unimplemented
      '          -xxx---- NOSC<2:0>: New Oscillator Source Request bits  110
      '          ----xxxx NDIV<3:0>: New Divider Selection Request bits  0000 div by 1
      OSCCON1 = %01100000    ' Primary OSC 64Mhz (16MHz + 4xPLL)
    
      '          x------- Unimplemented
      '          -xxx---- COSC: Current Oscillator Source Select bits (RO)
      '          ----xxxx CDIV<3:0>: Current Divider Select bits  (RO)
      OSCCON2 = %00000000
    
      '          x------- CSWHOLD: Clock Switch Hold Bit
      '          -x------ SOSCPWR: Secondary Oscillator Power Mode Select Bit
      '          --x----- Unimplemented
      '          ---x---- ORDY: Oscillator Ready Bit (RO)
      '          ----x--- NOSCR: New Oscillator is Ready Bit (RO)
      '          -----xxx Unimplemented
      OSCCON3 = %00000000
    
      '          x------- EXTOR: EXTOSC (external) Oscillator Ready Bit
      '          -x------ HFOR: HFINTOSC Oscillator Ready Bit
      '          --x----- MFOR: MFINTOSC Oscillator Ready
      '          ---x---- LFOR: LFINTOSC Oscillator Ready Bit
      '          ----x--- SOR: Secondary (Timer1) Oscillator Ready Bit
      '          -----x-- ADOR: ADC Oscillator Ready Bit
      '          ------x- Unimplemented
      '          -------x PLLR: PLL is Ready Bit
      OSCSTAT = %00000000   '
    
      '          xxxx---- Unimplemented
      '          ----xxxx HFINTOSC Frequency Selection bits
      OSCFRQ =  %00001000     ' 64MHz
    
      '          xx------ Unimplemented
      '          --xxxxxx TUN: HFINTOSC Frequency Tuning bits
      OSCTUNE = %00000000
    
      '          x------- EXTOEN: External Oscillator Manual Request Enable Bit
      '          -x------ HFOEN: HFINTOSC Oscillator Manual Request Enable Bit
      '          --x----- MFOEN: MFINTOSC (500 kHz/31.25 kHz) Oscillator Manual Request Enable Bit
      '          ---x---- LFOEN: LFINTOSC (31 kHz) Oscillator Manual Request Enable Bit
      '          ----x--- SOSCEN: Secondary Oscillator Manual Request Enable Bit
      '          -----x-- ADOEN: ADC Oscillator Manual Request Enable Bit            ???????????????????????
      '          ------xx Unimplemented
      OSCEN   = %00000000   '
    
      PPSLOCK = $55             ' PPS unlock
      PPSLOCK = $AA
      PPSLOCK.0 = 0
    
      'Module: I2C2
      I2C2SDAPPS = 0x09         ' RB1 > SDA2
      RB1PPS     = 0x24         ' SDA2 > RB1 (bi-directional)
      I2C2SCLPPS = 0x0A         ' RB2 > SCL2
      RB2PPS     = 0x23         ' SCL2 > RB2 (bi-directional only if slave)
      'Module: SPI1
      SPI1SDIPPS = 0x14         ' RC4 > SDI1
      RB0PPS     = 0x1F         ' SDO1 > RB0
      SPI1SCKPPS = 0x15         ' RC5 > SCK1
      RC5PPS     = 0x1E         ' SCK1 > RC5 (bi-directional only if slave)
      'Module: UART1
      U1RXPPS    = 0x17         ' RC7 > RX1
      RC6PPS     = 0x13         ' TX1 > RC6
      'Module: UART2
      U2RXPPS    = 0x10         ' RC0 > RX2
      RC1PPS     = 0x16         ' TX2 > RC1
    
      PPSLOCK = $55             ' PPS LOCK
      PPSLOCK = $AA
      PPSLOCK.0 = 1
    
    
      '          x------- EN: Fixed Voltage Reference Enable Bit
      '          -x------ RDY: Fixed Voltage Reference Ready Flag Bit (always 1)
      '          --x----- TSEN: Temperature Indicator Enable Bit
      '          ---x---- TSRNG: Temperature Indicator Range Selection Bit
      '          ----xx-- CDAFVR: Comparator FVR Buffer Gain Selection bits
      '          ------xx ADFVR: ADC FVR Buffer Gain Selection Bit
      'FVRCON  = %10000001   '
    
    
      '          x------- U1BRGS: Baud rate Generator Speed Select Bit
      '          -x------ U1ABDEN: Auto-baud Detect Enable Bit
      '          --x----- U1TXEN: Transmit Enable Control Bit
      '          ---x---- U1RXEN: Receive Enable Control Bit
      '          ----xxxx U1MODE: UART Mode Select bits
      'U1CON0  = %00000000   '
    
    
      '          x------- U1On: Serial Port Enable Bit
      '          -xx----- Unimplemented
      '          ---x---- U1WUE: Wake-up Enable Bit
      '          ----x--- U1RXBIMD: Receive Break Interrupt Mode Select Bit
      '          -----x-- Unimplemented
      '          ------x- U1BRKOVR: Send Break Software Override Bit
      '          -------x U1SENDB: Send Break Control Bit
      'U1CON1  = %00000000   '
    
    
      '          x------- U1RUNOVF: Run During Overflow Control Bit
      '          -x------ U1RXPOL: Receive Polarity Control Bit
      '          --xx---- U1STP: Stop Bit Mode Control bits
      '          ----x--- U1C0EN: Checksum Mode Select Bit
      '          -----x-- U1TXPOL: Transmit Polarity Control Bit
      '          ------xx U1BRKOVR: Send Break Software Override Bit
      '          -------x U1FLO: Handshake Flow Control bits
      'U1CON2  = %00000000   '
    
    
    
    
    
      '          x------- U2BRGS: Baud rate Generator Speed Select Bit
      '          -x------ U2ABDEN: Auto-baud Detect Enable Bit
      '          --x----- U2TXEN: Transmit Enable Control Bit
      '          ---x---- U2RXEN: Receive Enable Control Bit
      '          ----xxxx U2MODE: UART Mode Select bits
      'U2CON0  = %00000000   '
    
    
      '          x------- U2On: Serial Port Enable Bit
      '          -xx----- Unimplemented
      '          ---x---- U2WUE: Wake-up Enable Bit
      '          ----x--- U2RXBIMD: Receive Break Interrupt Mode Select Bit
      '          -----x-- Unimplemented
      '          ------x- U2BRKOVR: Send Break Software Override Bit
      '          -------x U2SENDB: Send Break Control Bit
      'U2CON1  = %00000000   '
    
    
      '          x------- U2RUNOVF: Run During Overflow Control Bit
      '          -x------ U2RXPOL: Receive Polarity Control Bit
      '          --xx---- U2STP: Stop Bit Mode Control bits
      '          ----x--- U2C0EN: Checksum Mode Select Bit
      '          -----x-- U2TXPOL: Transmit Polarity Control Bit
      '          ------xx U2BRKOVR: Send Break Software Override Bit
      '          -------x U2FLO: Handshake Flow Control bits
      'U2CON2  = %00000000   '
    
      Return
    
    
      Stop                                  ' jic
    
    '***********************  C O N F I G   *************************
        ' internal clock 64MHz
      Config_Start
        FEXTOSC = OFF               ; Oscillator not enabled
        RSTOSC = HFINTOSC_64MHZ     ; HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1
    CLKOUTEN = OFF             ; CLKOUT function is disabled
        PR1WAY = OFF               ; PRLOCK bit can be set and cleared repeatedly
        CSWEN = On                 ; Writing to NOSC and NDIV is allowed
        FCMEN = OFF                 ; Fail-Safe Clock Monitor disabled
        PWRTS = PWRT_1             ; PWRT set at 1ms
        MVECEN = OFF               ; Interrupt contoller does not use vector table to prioritze interrupts
        IVT1WAY = OFF               ; IVTLOCK bit can be cleared and set repeatedly
        LPBOREN = On               ; ULPBOR enabled
        BORV = VBOR_2P7             ; Brown-out Reset Voltage (VBOR) set to 2.7V
        ZCD = OFF                   ; ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON
        PPS1WAY = OFF               ; PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)
        STVREN = On                 ; Stack full/underflow will cause Reset
        MCLRE = EXTMCLR             ; MCLR pin enabled, RE3 input pin disabled
        LVP = On                 ; SINGLE-Supply ICSP enabled
        BOREN = OFF                 ; Brown-out Reset disabled in hardware and software
        Debug = OFF                 ; Background debugger disabled
        XINST = OFF                 ; Extended Instruction Set and Indexed Addressing Mode disabled
        WDTCPS = WDTCPS_31         ; Divider ratio 1:65536; software control of WDTPS
        WDTE = OFF                 ; WDT Disabled; SWDTEN is ignored
        WDTCWS = WDTCWS_7           ; window always open (100%); software control; keyed access not required
        WDTCCS = SC                 ; Software Control
        BBSIZE = BBSIZE_512         ; Boot Block size is 512 words
        BBEN = OFF                 ; Boot block disabled
        SAFEN = On                 ; SAF enabled
        WRTAPP = OFF               ; Application Block not write protected
        WRTB = OFF                 ; Configuration registers (300000-30000Bh) not write-protected
        WRTC = OFF                 ; Boot Block (000000-0007FFh) not write-protected
        WRTD = OFF                 ; Data EEPROM not write-protected
        WRTSAF = OFF               ; SAF not Write Protected
        Cp = OFF                   ; PFM and Data EEPROM code protection disabled
      Config_End
    
    
      Org ((($>>4)+1)<<4)
      HexTag: CData 0, 0, 0, 0, 0, 0, (VersionHigh << 4) | (VersionLow), 0, 0, 0, 0, 0, $55, $CC
    
    '*****************************************************************
    'end of 18F27K42_template.bas
    George

  4. #144
    Prolific Poster normnet's Avatar
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    Default Re: FineLineIDE

  5. FineLineIDE 4.3.1 now available here.

    v4.3.1:
    Explorer view now widens as explorer is widened to better view when text size is set larger in PC settings. Corrected issues when tab is blank (untitled) as to paste, undo and compile toolbar enabled.

    Norm

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