Weird interrupt behavior...need wise advise


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  1. #1
    jncortes
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    Smile Weird interrupt behavior...need wise advise

    The purpose of this code is to read USART's RCREG on a high priority interrupt on a 18F4620.

    Thus, in the code at the bottom, I'm using a bare bones high priority interrupt routine to increment a counter variable isr just to test if the routine works. I simulate most of my code in Labcenter's VSM with excellent results, but in this particular code (in part borrowed from one the distinguished forum members) if reading directly from RCREG from the USART, does nothing. But using HSerin works in the simulator, Yet interestingly enough, neither reading directly from RCREG or HSerin work in the real 18F4620 hardware.

    Refer to the line in the program whereit says:
    Code:
    tempRCREG=RCREG       ' Using this line, which captures RCREG does not work in Labcenter VSM at all! nor in the real 18F4620 circuit. 
    'HSerIn[tRCREG]    ' However when the previous line is commented out, and this one activated
                       ' simulation works in Labcenter VSM...yet it does not work on the real 18F4620

    Perhaps I'm not setting something correctly or missing something, or better yet PROTON has a bug somewhere related to high priority interrupts/USART/HSERin.
    I have read the datasheet of the 18F4620, many many times without luck... from interrupts.... to the USART receive mechanism....and everything in between.

    If anyone could suggest anything I would than you big time!



    Code:
    '*******************************************************************
    '*  Name    : SERIAL DATA RECEIVER using HIGH PRIPORITY INTERRUPT  * 
    '*  Author  : JNCORTES                                             *
    '*  Notice  : Copyright (c) 2006 [select VIEW...EDITOR OPTIONS]    *
    '*          : All Rights Reserved                                  *
    '*  Date    : 10/28/2009                                           *
    '*  Version : 1.0                                                  *
    '*  Notes   :                                                      *
    '*          :                                                      *
                                                
             
        Device 18F4620
        
    Include "FUSES.Inc"    
        Xtal = 20
        All_Digital = True 
        
        Declare Hserial_Baud 9600      ' Any Baudrate        
        Hserial_Clear = On             ' Enable Error clearing on received characters
        LCD_Type = ALPHA 
        LCD_DTPin = PORTB.4     
        LCD_RSPin = PORTB.0 
        LCD_ENPin = PORTB.2
        LCD_Interface = 4               ' 4-bit Interface 
        LCD_Lines = 2
        Declare LCD_CommandUs 1600 
        Declare LCD_DataUs  50
    '******************** some variables here ****************************************************************
        Dim var1 As Byte
        Dim var2 As Byte
        Dim var3 As Byte
        Dim t As Byte
        Dim dispInit As Byte
        Dim j As Byte
        Dim isr As Byte
        Dim tempRCREG  As Byte
    '====== Some symbol names here ======================================
            
        Symbol BRG16    = BAUDCON.3         '1 = 16-bit Baud Rate Generator  SPBRGH and SPBRG  , 0 = 8-bit Baud Rate Generator  SPBRG only (Compatible mode), SPBRGH value ignored  
        Symbol IPEN     = RCON.7            'Enable priority interrupts  
        Symbol sentLED  = PORTA.2
        Symbol rcvLED   = PORTA.3
        Symbol SPEN     = RCSTA.7          'SPEN: Serial Port Enable bit    '1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins)
        Symbol SYNC     = TXSTA.4                   
        Symbol CREN     = RCSTA.4           'CREN: Continuous Receive Enable bit 
                                            'Asynchronous mode: 1 = Enables receiver
        Symbol GIE      = INTCON.7          ' Global Interrupt Enable 
        Symbol PEIE     = INTCON.6          ' Peripheral Interrupt Enable bit               
        Symbol RCIF     = PIR1.5            ' The EUSART receive buffer, RCREG, is full (cleared when RCREG is read)
        Symbol RCIE     = PIE1.5            ' USART interrupt enable
        Symbol RCIP     = IPR1.5            ' bit 5 RCIP: EUSART Receive Interrupt Priority bit
    
        IPR1=%00100000                     ' Enable high Interrupt priority. 
    '************INITIALIZE INTERUPTS AND SOME variables   ***********************************************************
        Clear SYNC                      ' 0 = Asynchronous mode
        Set IPEN                        'Enable priority interrupts 
        Set PEIE                        ' Peripheral interrupt enable   
        Set GIE                         ' Global Interrupt Enable
        Set SPEN                        ' serial port enable bit
        Set CREN                        ' Continuous Receive Enable bit 
        'RCIF                           ' READ ONLY ..... The EUSART receive buffer, RCREG, is full (cleared when RCREG is read)
        Set RCIE                        ' USART interrupt enable
        Set RCIP                        ' bit 5 RCIP: EUSART Receive Interrupt Priority bit  1 =High priority
        j=0
        dispInit=0
        isr=0
        dispInit=0
     '******************** PORTS  INITIALIZED ***************************************************
        TRISA = %10000011               ' PORT A To outputs (exception of RA5 which can only act as an input!!!!
        TRISB = %00000000               '
        TRISC.7=1                       'RX pin is now an input
        TRISC.6=1                       'TX pin is now an input
        RCSTA = %10010000               ' bit 7=1:Serial port enabled (configures RX/DT and TX/CK pins as serial port pins)
                                        ' bit 6=0:Selects 8-bit reception
                                        ' bit 5=0:Don't care for now
                                        ' Bit 4=1:Continuous Receive Enable bit Asynchronous mode where 1 = Enables receiver,
                                        ' Bit 3=0: Don't care for now.
                                        ' Bit 2=0: don't care for now.
                                        ' Bit 1=0: don't care for now.
                                        ' Bit 0=0: Don't care for now.  9th bit of Received Data
        TXSTA = %00000000               ' bit 7=1: Enable transmit, bit 7 CSRC: Clock Source Select bit
    
    '*****************************************************************************************************
    DelayMS 500        'just a puse before starting
    On_Hardware_Interrupt GoTo HIGH_INTERRUPT_ROUTINE  ' Point the High Priority interrupt handler to the subroutine  
    GoTo MAIN
    ;---------------------------------- interrupt service routine -------------------------
    High_Int_Sub_Start
    HIGH_INTERRUPT_ROUTINE:
    Context Save
    
    tempRCREG=RCREG       ' Using this line, which captures RCREG does not work in Labcenter VSM at all! nor in the real 18F4620 circuit. 
    'HSerIn[tRCREG]    ' However when the previous line is commented out, and this one activated
                       ' simulation works in Labcenter VSM...yet it does not work on the real 18F4620
    
    isr=isr+1          ' isr just count how many time interrupt has been thru here.
    
    Clear CREN
    Set CREN
    
    Context Restore             ' Exit ISR and re-enable interrupts  
     Return
     High_Int_Sub_End
    ;--------------------------------------------------------------------------------------
    
    '***************************** MAIN CODE ***********************************
    MAIN:
        If dispInit =0 Then
            Cls 
            Print "Hello"     ' Intitalize the display fisrt time
            Print $FE, $C0
            dispInit=1
            DelayMS 500
            Cls
        EndIf    
            Print "Main: isr=",Dec isr  ' Prints every time the interrupt is serviced couter will increase by 1.
             Print $FE, $C0
    
    
    GoTo MAIN                             'Loop forever

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  • #2
    Prolific Poster shantanu@india's Avatar
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    Code:
    Context Restore             ' Exit ISR and re-enable interrupts  
     Return
     High_Int_Sub_End
    I do not think the "return" instruction is necessary.The compiler automatically inserts the "RETFIE" at the end of the interrupt routine.
    Shantanu

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  • #3
    Fanatical Contributor Tim's Avatar
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    A couple of points

    1 for the code you have you do not need "High_Int_Sub_Start" etc
    2 you have no buffer over run code (proabably the main issuse)

    I will later post the right code
    Tim

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  • #4
    jncortes
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    Oh! I see...

    Thank Guys, I'll try those suggestions.

    Tim, I did notice frame errors and over run error bits where ALWAYS ON when reading RCREG manually where as using HSerIn does not (OERR and FERR bits in RCSTA register).

    So yes I'll be grateful for a snippet for "buffer overrun code"!


    THANK YOU GUYS!!!!
    I'll post the full working code when done for the use of others when complete.

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  • #5
    Fanatical Contributor Tim's Avatar
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    Here is the over run section


    If OERR = 1 Then GoTo USART_ERR ' Check for usart overrun
    If RCIF = 0 Then GoTo USART_RECEIVE_EXIT2 ' Check this is a Usart in interrupt

    USART_RECEIVE_EXIT2:
    retfie fast

    USART_ERR:
    WREG = RCREG
    CREN = 0
    CREN = 1
    GoTo USART_RECEIVE_EXIT2
    Tim

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