[SOLVED !] 18F config fuses


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Thread: 18F config fuses4511 days old

  1. #1
    richardy
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    Default 18F config fuses

    Hi,
    The following is the config fuse settings for an 18F1320. Can anybody see any obvious mistakes. The full program is doing a few odd things that dont seem to be caused by anything else. Is this the normal way of setting the config fuses for the 18Fs or is there a better way. Any help would be much apreciated.

    Code:
    'initialise chip
    Device 18F1320
    
    @CONFIG_REQ
    @__CONFIG CONFIG1H, IESO_OFF_1 & FSCMEN_OFF_1 & HS_OSC_1
    @__CONFIG CONFIG2L, BOR_OFF_2 & PWRT_ON_2
    @__CONFIG CONFIG2H, WDT_OFF_2
    @__CONFIG CONFIG3H, MCLRE_ON_3
    @__CONFIG CONFIG4L, DEBUG_OFF_4 & LVP_OFF_4 & STVR_OFF_4
    @__CONFIG CONFIG5L, CP0_OFF_5 & CP1_OFF_5
    @__CONFIG CONFIG5H, CPB_OFF_5 & CPD_OFF_5
    @__CONFIG CONFIG6L, WRT0_OFF_6 & WRT1_OFF_6
    @__CONFIG CONFIG6H, WRTB_ON_6 & WRTC_ON_6 & WRTD_OFF_6
    @__CONFIG CONFIG7L, EBTR0_ON_7 & EBTR1_ON_7
    @__CONFIG CONFIG7H, EBTRB_ON_7
    
    XTAL = 20
    
    DelayMS 100
    
    ALL_DIGITAL = true

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  • #2
    Senior Member dolci's Avatar
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    Code:
           Device 18F1320
           Xtal 20
           @CONFIG_REQ
           @__config config1h, HS_OSC_1
           @__config config2l, BOR_ON_2 & BORV_20_2 & PWRT_ON_2
           @__config config2h, WDT_OFF_2 & WDTPS_128_2
           @__config config3h, MCLRE_ON_3
           @__config config4l, STVR_ON_4 & LVP_OFF_4 & DEBUG_OFF_4
    From where you get your config? Unless you know what you are doing don't play with the configuration, the lpb file is enough to get you going.
    [SIGPIC][/SIGPIC]

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  • #3
    Fanatical Contributor Tim's Avatar
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    You can set the config fuses for 18 series differently now and its recommended you do so.

    As in this example
    CONFIG_START
    OSC = HS ; HS Oscillator
    FSCM = OFF ; Fail-Safe Clock Monitor disabled
    IESO = OFF ; Internal External Switch Over mode disabled
    PWRT = ON ; Enabled
    BOR = ON ; Enabled
    BORV = 42 ; 4.2V
    WDT = OFF ; Disabled
    MCLRE = ON ; Enabled
    STVR = ON ; Enabled
    LVP = OFF ; Disabled
    DEBUG = OFF ; Disabled
    CONFIG_END

    It was generated by a new plug in from Johnb
    Tim

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  • #4
    Prolific Poster RGV250's Avatar
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    Hi Tim,
    Is that for the imminent release or the current one, if it is for the current one where can I download the plug in.

    It looks really good and will simplify things a lot.

    Regards,
    Bobby

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  • #5
    Senior Member dolci's Avatar
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    To add to Tim's new configuration set-up
    Code:
    CONFIG_START
    ' Oscillator Selection:
    OSC = HSPLL ' HS-PLL Enabled
    ' Fail-Safe Clock Monitor Enable:
    FCMEN = OFF ' Disabled
    ' Internal/External Switch-Over:
    IESO = OFF ' Disabled
    ' Power-up Timer:
    PWRTEN = On ' Enabled
    ' Brown-out Reset:
    BOREN = On ' Enabled
    ' Brown-out Voltage:
    BORV = 20 ' 2.0V
    ' Watchdog Timer:
    WDTEN = OFF ' Disabled
    ' Watchdog Timer Enable Window:
    WINEN = OFF ' Disabled
    ' Watchdog Postscaler:
    WDPS = 32768 ' 1:32768
    ' Timer1 Oscillator MUX:
    T1OSCMX = On ' Inactive
    ' High-Side Transistors Polarity:
    HPOL = Low ' Active low
    ' Low-Side Transistors Polarity:
    LPOL = Low ' Active low
    ' PWM output pins Reset state control:
    PWMPIN = OFF ' Disabled
    ' MCLR Enable:
    MCLRE = OFF ' Disabled (pin acts as input) << 
    ' MCLRE = ON ' Enabled (pin acts as MCLR) << 
    ' Stack Overflow Reset:
    STVREN = OFF ' Disabled
    ' Low Voltage Programming:
    LVP = OFF ' Disabled
    ' Background Debugger Enable:
    Debug = OFF ' Disabled
    ' Code Protection Block 0:
    CP0 = OFF ' Disabled
    ' Code Protection Block 1:
    CP1 = OFF ' Disabled
    ' Boot Block Code Protection:
    CPB = OFF ' Disabled
    ' Data EEPROM Code Protection:
    CPD = OFF ' Disabled
    ' Write Protection Block 0:
    WRT0 = OFF ' Disabled
    ' Write Protection Block 1:
    WRT1 = OFF ' Disabled
    ' Boot Block Write Protection:
    WRTB = OFF ' Disabled
    ' Configuration Register Write Protection:
    WRTC = OFF ' Disabled
    ' Data EEPROM Write Protection:
    WRTD = OFF ' Disabled
    ' Table Read Protection Block 0:
    EBTR0 = OFF ' Disabled
    ' Table Read Protection Block 1:
    EBTR1 = OFF ' Disabled
    ' Boot Block Table Read Protection:
    EBTRB = OFF ' Disabled
    CONFIG_END
    Where can we download that new plugins of Johnb? It's cool!
    [SIGPIC][/SIGPIC]

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  • #6
    Fanatical Contributor Tim's Avatar
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    It uses the new .PPI config file system for the delayed new version, so when that comes out John will release it.
    Tim

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  • #7
    richardy
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    HI,
    Thanks for your help, i had indeed made an error in the config settings. Program now runs fine. Thanks agian.

    Cheers,

    Richard.

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  • #8
    J. Mark Wolf
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    Richard

    I'm getting some peculiar program operation as well, and have played with the fuse settings to no avail.

    Can you elaborate as to what was the fix to your issue?

    Thanks.

    Quote Originally Posted by richardy View Post
    Hi,
    The following is the config fuse settings for an 18F1320. Can anybody see any obvious mistakes. The full program is doing a few odd things that dont seem to be caused by anything else. Is this the normal way of setting the config fuses for the 18Fs or is there a better way. Any help would be much apreciated.

    Code:
    'initialise chip
    Device 18F1320
    
    @CONFIG_REQ
    @__CONFIG CONFIG1H, IESO_OFF_1 & FSCMEN_OFF_1 & HS_OSC_1
    @__CONFIG CONFIG2L, BOR_OFF_2 & PWRT_ON_2
    @__CONFIG CONFIG2H, WDT_OFF_2
    @__CONFIG CONFIG3H, MCLRE_ON_3
    @__CONFIG CONFIG4L, DEBUG_OFF_4 & LVP_OFF_4 & STVR_OFF_4
    @__CONFIG CONFIG5L, CP0_OFF_5 & CP1_OFF_5
    @__CONFIG CONFIG5H, CPB_OFF_5 & CPD_OFF_5
    @__CONFIG CONFIG6L, WRT0_OFF_6 & WRT1_OFF_6
    @__CONFIG CONFIG6H, WRTB_ON_6 & WRTC_ON_6 & WRTD_OFF_6
    @__CONFIG CONFIG7L, EBTR0_ON_7 & EBTR1_ON_7
    @__CONFIG CONFIG7H, EBTRB_ON_7
    
    XTAL = 20
    
    DelayMS 100
    
    ALL_DIGITAL = true

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  • #9
    richardy
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    Hi Mark,
    Basically the fix for me was the post originally given in the thread by Dolci. So assuming you are using 18F1320 and you are not using anything to fancy, the following should work:

    Code:
    Device 18F1320
    Xtal 20
    DelayMS 200
    ALL_DIGITAL = true
    @CONFIG_REQ
    @__config config1h, HS_OSC_1
    @__config config2l, BOR_ON_2 & BORV_27_2 & PWRT_ON_2
    @__config config2h, WDT_OFF_2
    @__config config3h, MCLRE_ON_3
    @__config config4l, STVR_ON_4 & LVP_OFF_4 & DEBUG_OFF_4
    You may need to alter, for example, the config1h line if you are using a standard crystal etc. Note that all the information required can be found in the data sheets generally under "special features of the CPU".

    Cheers.

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  • #10
    Mark Rodgers
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    When using 18F PICs Les introduced a much easier way of doing the config, quote from "Whats New" in the Help Menu,
    " Additions, amendments and fixes made in version 3.2.4.5 of the PROTON+ Compiler. (9th February 2006) .....Added statements CONFIG_START and CONFIG_END to encompass the new CONFIG directives for 18F devices: -"

    This means you can now do:-

    Code:
    CONFIG_START
        OSC = HS         ' Oscillator Selection HS
        OSCS = OFF       ' Osc. Switch Enable Disabled
        PWRT = ON        ' Power-up Timer Enabled
        BOR = OFF        ' Brown-out Reset Disabled
        BORV = 25        ' Brown-out Voltage 2.5V
        WDT = OFF        ' Watchdog Timer Disabled
        WDTPS = 128      ' Watchdog Postscaler 1:128
        CCP2MUX = ON     ' CCP2 MUX Enable (RC1)
        STVR = OFF       ' Stack Overflow Reset Disabled
        LVP = OFF        ' Low Voltage ICSP Disabled
        DEBUG = OFF      ' Background Debugger Enable Disabled
        CP0 = OFF        ' Code Protection Block 0 Disabled
        CP1 = OFF        ' Code Protection Block 1 Disabled
        CP2 = OFF        ' Code Protection Block 2 Disabled
        CP3 = OFF        ' Code Protection Block 3 Disabled
        CPB = OFF        ' Boot Block Code Protection Disabled
        CPD = OFF        ' Data EEPROM Code Protection Disabled
        WRT0 = OFF       ' Write Protection Block 0 Disabled
        WRT1 = OFF       ' Write Protection Block 1Disabled
        WRT2 = OFF       ' Write Protection Block 2 Disabled
        WRT3 = OFF       ' Write Protection Block 3 Disabled
        WRTB = OFF       ' Boot Block Write Protection Disabled
        WRTC = OFF       ' Configuration Register Write Protection Disabled
        WRTD = OFF       ' Data EEPROM Write Protection Disabled
        EBTR0 = OFF      ' Table Read Protection Block 0 Disabled
        EBTR1 = OFF      ' Table Read Protection Block 1 Disabled
        EBTR2 = OFF      ' Table Read Protection Block 2 Disabled
        EBTR3 = OFF      ' Table Read Protection Block 3 Disabled
        EBTRB = OFF      ' Boot Block Table Read Protection Disabled
    CONFIG_END
    The above is for the 18F452, the 1320, and all other PIC18, config is listed in this Microchip document:-

    http://ww1.microchip.com/downloads/e...ngs_51537e.pdf

    It is advisable(so I was told!) to set every option in the config then you will never have one of the defaults causing you an unexpected problem.

    If you are unable to get it going with that I do not know what else could possibly be wrong.

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  • #11
    Member Frizie's Avatar
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    Unhappy Constantnames OFF and ON

    I always use the bit constant names 'OFF' and 'ON' in my programs.
    i.e. LED = ON

    Now with the 18Fxxx CONFIG_START ... CONFIG_END, these variablenames are not allowed anymore.
    Very pity.
    Ohm sweet Ohm: www.picbasic.nl

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  • #12
    Mark Rodgers
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    For any user of the 1220/1320 Microchip have just released a new datasheet and errata.

    http://ww1.microchip.com/downloads/e...doc/80352a.pdf
    http://ww1.microchip.com/downloads/e...doc/80308c.pdf

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