Proton BASIC Compiler - Using the PIC's Serial Programming Pins

  • Using the PIC's Serial Programming Pins

    The nice thing about using the ICSP (In Circuit Serial Programmming) is you can assemble the complete product and lastly just program and test. This is especially handy for SMD components because it is quite troublesome to remove the pic for programming in a socket off the board. During development a pic gets re-programmed a few times over to make adjustments to get the program to work properly, so it is important to have the ICSP working correctly.

    As with most thing in life everything is not as simple as they seem. If the circuitry that connects to the ICSP pins are not designed correctly, you won't be able to program the pic. Big, big trouble (Bart Simpson)

    When you have connected the programmer to the ICSP pins of the pic, the programmer applies a higher than supply voltage to the Vpp pin. This automatic makes the ICSP data and ICSP clock pins inputs and connects internally to the program memory. During programming the data is clocked into the pic starting at adress 0, and with each clock the next bit is programmed. Once the program is transferred inside the pic, the programmer makes the VPP low and the pic comes out of reset and will want to run the program.

    Some examples of working and some not working circuits. They apply to any and all pics.

    This is a working circuit.

    The VPP pin as an input can only be sourced, but the pin is pulled low if the input is low. When the programmer pulls the Vpp pin high, the input signal has no effect on the programming voltage.

    The two pot's, representing A/D inputs on AN0 and AN1 have 10k resistors in series with them. When the data gets clocked into the pic, the 10k's provide high impedence and the clock and data signals will work properly.

    This is a non-working circuit.

    The Vpp pin can in this case drift > V+, even with simple static. It looks like the pic just won't run, but it is actually in program mode. When you short the Vpp pin to V+ or gnd, it will suddenly run again. If this pin is not used as an input, it should be connected to V+ or GND through a 10k resistor.

    RA0 configured as an output may present a problem. The impedence to the transistor is quite low and the programmer may see it as a short and not be able to send the data at the acceptable levels into the pic. If you have to use such a low impedence resistor due to the low gain of the transistor, use another pin instead. Driving a small transistor and a 4k7 resistor to gate won't be a problem.

    RA1 configured as an input has a problem. It's task is to sense when the contact opens or closes. Here it is a short to GND and the CLK signal will not work. A series resistor (like in picture 4) would solve the problem by providing high enough impedence.

    Another non-working circuit.

    The opp amp connected to Vpp is going to prevent the VPP pin from getting the pic in program mode. A 10k from the opp amp output will solve this problem. Keep in mind not all components can withstand overvoltage, even on their outputs, and this is something to take into consideation here.

    AN0 may present a problem. Depending where the wiper of the pot is, it may or may not cause a problem. If the pot's wiper is set to too near max or too near min, the data pin is going to look like a short to the programmer. If the wiper is adjusted to around the centre position, the data pin will work. In this case it would be good practice to have once again a series resistor.

    AN1 represents an analog input from an external source. The capacitor is there for smoothing if you could get a 'dirty' or unstable analog input, and the series resistor it the averaging buffer for it (it should actually be much higher for a 0.1uF cap, ie 27k +). Here however it is a problem. The clock oscillates quite fast and it sees the capacitor as a short. The higher a frequency, the lower a cap's impedence is going to be. Solution again will be a high impedence resistor, a 4k7 would do, connected from the 0.1uF cap to the pic and the CLK input.

    Another working circuit.

    The opp amp represents a low (0) or high (1) input to the Vpp pin. The zener or transzorb will prevent the input signal to rise above V+, while when you program, the Vpp pin can be taken up without any problems and put the pic in program mode.

    RA0 has no problem. The FET gate is high impedence, and even when RA0 becomes an input, it has no effect on the DAT signal. The only thing to watch out for is if you have a critical component on the open collector FET, it will get switched as the data's 1's and 0's is clocked in. A normal relay won't be a problem, but some components may not like it, or power components intended for fast switching may draw excessive currents.

    RA1 - the solution to monitoring the close contact and the CLK input.

    Compliments Fanie
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