• PicŪ Basic

  • 1MHz Square Wave generator using the PWM peripheral

    Here's a setup that will generate a 1MHz square wave output from the CCP1 peripheral, and operate in the background, using a 64MHz fOSC:

    ' Setup the CCP1 peripheral to give a 1MHz 50% duty cycle square wave using a 64MHz oscillator
        Device = 18F26K22
        Declare Xtal = 64
        GoTo Main
    ' Enable the 1MHz output by making the CCP1 pin an output
    $define Enable_1MHz() Output PORTC.2
    ' Disable the 1MHz output by making the CCP1 pin an input
    $define Disable_1MHz() Input PORTC.2
    ' Setup CCP1 to operate at 1MHz, using a 64MHz Osc
    Sub CCP1_1MHz()
    ' Setup Timer2
        PR2 = $0F
        TMR2 = $00
        PIR1bits_TMR2IF = 0
        T2CON = $04                 ' T2CKPS 1:1, T2OUTPS 1:1, TMR2ON on
    ' Setup the CCP1 peripheral
        CCPTMRS0bits_C1TSEL0 = 0   
        CCPTMRS0bits_C1TSEL1 = 0    
        CCP1CON = $3C               
        ECCP1AS = $00               
        PWM1CON = $80              
        PSTR1CON = $01    
        CCPR1H = $00                ' \
        CCPR1L = $07                ' / Set for 50% duty cycle
        Enable_1MHz()               ' Set the CCP1 pin as an output
    ' The main program starts here
        CCP1_1MHz()                 ' Start the 1MHz output from PORTC.2
    ' Setup for 64MHz operation using an external 16MHz crystal
        PLLCFG = On         ' Oscillator multiplied by 4
        FOSC = HSHP         ' HS oscillator (high power > 16 MHz)
        Debug = Off         ' Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins
        WDTEN = Off         ' WDT disabled (control is placed on SWDTEN bit)
        XINST = Off         ' Disabled
        FCMEN = On          ' Fail-Safe Clock Monitor enabled
        IESO = Off          ' Oscillator Switchover mode disabled
        PWRTEN = On         ' PWRT enabled
        BOREN = On          ' Brown-out Reset enabled and controlled by software (SBOREN is enabled)
        BORV = 190          ' VBOR set to 1.9 V nominal
        WDTPS = 128         ' Watchdog ratio 1:128
        MCLRE = EXTMCLR     ' MCLR pin enabled, RE3 input pin disabled
        HFOFST = Off        ' The system clock is held off until the HF-INTOSC is stable.
        PRICLKEN = On       ' Primary clock enabled
        PBADEN = Off        ' PORTB<4:0> pins are configured as digital I/O on Reset
        CCP2MX = PORTC1     ' CCP2 input/output is multiplexed with RC1
        CCP3MX = PORTB5     ' P3A/CCP3 input/output is multiplexed with RB5
        T3CMX = PORTC0      ' T3CKI is on RC0
        P2BMX = PORTB5      ' P2B is on RB5
        STVREN = On         ' Stack full/underflow will cause Reset
        LVP = Off           ' Single-Supply ICSP disabled
        Cp0 = Off           ' Block 0 (000800-001FFFh) not code-protected
        CP1 = Off           ' Block 1 (002000-003FFFh) not code-protected
        CPB = Off           ' Boot block (000000-0007FFh) not code-protected
        CPD = Off           ' Data EEPROM not code-protected
        WRT0 = Off          ' Block 0 (000800-001FFFh) not write-protected
        WRT1 = Off          ' Block 1 (002000-003FFFh) not write-protected
        WRTB = Off          ' Boot block (000000-0007FFh) not write-protected
        WRTC = Off          ' Configuration registers (300000-3000FFh) not write-protected
        WRTD = Off          ' Data EEPROM not write-protected
        EBTR0 = Off         ' Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
        EBTR1 = Off         ' Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
        EBTRB = Off         ' Boot block (000000-0007FFh) not protected from table reads executed in other blocks
    I wrote the code by examining the datasheet, and the values should give an exact 1MHz square wave, but it will also be down to component tolerances as to how exact the output frequency is.
    This article was originally published in forum thread: 1 Mhz generator started by teo View original post
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